Distinguished Paper Award Candidate
Synapse: Decoupling Protocol, Topology, and Policy for Automated Synthesis of Coherence Controllers
In Proceedings of the 59th IEEE/ACM International Symposium on Microarchitecture (MICRO '26)
Systems & Computer Architecture
PhD Student, Systems Research Group @ Technical University of Munich
I am a PhD student in the Systems Research Group at the Technical University of Munich, supervised by Prof. Pramod Bhatotia, since October 2024 (expected graduation: October 2028). My interests lie in computer architecture and systems, particularly memory disaggregation at rack scale and the scale-up interconnects, like CXL and related fabrics, that make it possible. Within that space, I focus on cache coherence protocols for heterogeneous systems.
During my master's studies I developed a strong interest in hardware acceleration for deep learning. My master's thesis, carried out in collaboration with the Embedded Systems Laboratory (ESL) at EPFL, focused on efficient mapping strategies for convolutional layers on OpenEdgeCGRA, an open-hardware, low-power CGRA platform.
I completed my Master's degree in Computer Engineering at Politecnico di Torino (Oct 2021–Mar 2024), specializing in embedded systems, and my Bachelor's degree in Electronic Engineering, also at Politecnico di Torino (Oct 2018–Sep 2021).
I am passionate about bridging the gap between hardware and software in next-generation computing architectures. If you're interested in collaborating or discussing my research, feel free to reach out.
Oct 2024 – present
Ph.D. Student, Technical University of Munich
Group: Chair of Computer Systems — Host: Prof. Pramod Bhatotia
2023 – 2024
Visiting Student, Embedded Systems Laboratory (ESL), EPFL
Mapping of CNN algorithms onto CGRA architectures, in collaboration with DAUIN, Politecnico di Torino.
Distinguished Paper Award Candidate
In Proceedings of the 59th IEEE/ACM International Symposium on Microarchitecture (MICRO '26)
Best Paper Award
In Proceedings of the 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS '26)
In Proceedings of the IEEE International Symposium on High-Performance Computer Architecture (HPCA '26)
In Proceedings of the 21st ACM International Conference on Computing Frontiers: Workshops and Special Sessions (CF '24)
In ACM Transactions on Computer Systems (TOCS), forthcoming, 2026
Under submission, 2026 (anonymized manuscript, not available)
Synapse
Generic synthesis of verified, gem5-ready coherence controllers by decoupling protocol, topology, and policy specifications.
2026
Synapse: Decoupling Protocol, Topology, and Policy for Automated Synthesis of Coherence Controllers
IEEE/ACM MICRO 2026, Athens, Greece
2026
Automated Synthesis of Verified CXL Bridges for Heterogeneous Architectures
DFG SPP 2377 “Disruptive Memory Technologies” Annual Meeting, Dresden, Germany
Disaggregated, Vendor-Generic APUs with CXL
Distinguished Paper Award Candidate 2026
IEEE/ACM MICRO 2026
Synapse: Decoupling Protocol, Topology, and Policy for Automated Synthesis of Coherence Controllers
Student Travel Grant 2026
IEEE/ACM MICRO 2026
Best Paper Award 2026
ACM ASPLOS 2026
vCXLGen: Automated Synthesis and Verification of CXL Bridges for Heterogeneous Architectures
Induction in IEEE-HKN (Mu Nu Chapter) 2022
Politecnico di Torino
I'm a naturally curious person, always eager to explore new ideas, dissect problems, and find solutions. One of my biggest passions outside of engineering is medicine — I grew up idolizing Dr. House, and I've always loved the mindset of diagnosing problems and figuring out solutions. This approach extends beyond my work; I apply it to everyday life, always searching for ways to understand and fix things.
To take a break from my daily routine, I turn to sports, both indoor and outdoor: skiing, tennis, football, basketball, and padel, to volleyball — yes, I was a hyperactive kid.
Beyond sports, music has been a big part of my life. I played piano and flute for over eight years.