Decoupling Protocol, Topology, and Policy for Automated Synthesis of Coherence Controllers
In Proceedings of the 59th IEEE/ACM International Symposium on Microarchitecture (MICRO '26)
Systems & Computer Architecture
PhD Candidate, Systems Research Group @ Technical University of Munich
I am a PhD student in the Systems Research Group at the Technical University of Munich, supervised by Prof. Pramod Bhatotia. My interests lie in computer architecture and systems, particularly memory disaggregation at rack scale and the scale-up interconnects, like CXL and related fabrics, that make it possible. Within that space, I focus on cache coherence protocols for heterogeneous accelerators, including GPUs, and on automating the design and verification of the controllers that implement them.
During my master's studies I developed a strong interest in hardware acceleration for deep learning. My master's thesis, carried out in collaboration with the Embedded Systems Laboratory (ESL) at EPFL, focused on efficient mapping strategies for convolutional layers on OpenEdgeCGRA, an open-hardware, low-power CGRA platform.
I completed my Master's degree in Computer Engineering at Politecnico di Torino (2021–2024), specializing in embedded systems, and my Bachelor's degree in Electronic Engineering, also at Politecnico di Torino (2018–2021).
I am passionate about bridging the gap between hardware and software in next-generation computing architectures. If you're interested in collaborating or discussing my research, feel free to reach out.
Oct 2024 – present
Ph.D. in Computer Science
Technical University of Munich — Systems Research Group, advised by Prof. Pramod Bhatotia
2021 – 2024
M.Sc. Computer Engineering
Politecnico di Torino, Turin, Italy — Thesis: "Designing and Evaluating Mapping of CNN Layers on an Edge-CGRA," with EPFL ESL
2018 – 2021
B.Sc. Electronic Engineering
Politecnico di Torino, Turin, Italy
2013 – 2018
Scientific High School Diploma
Liceo Pietro Paolo Parzanese, Ariano Irpino, Italy
2023 – 2024
Visiting Student, Embedded Systems Laboratory (ESL), EPFL
Mapping of CNN algorithms onto CGRA architectures, in collaboration with DAUIN, Politecnico di Torino.
In Proceedings of the 59th IEEE/ACM International Symposium on Microarchitecture (MICRO '26)
Best Paper Award
In Proceedings of the 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS '26)
In Proceedings of the IEEE International Symposium on High-Performance Computer Architecture (HPCA '26)
In Proceedings of the 21st ACM International Conference on Computing Frontiers: Workshops and Special Sessions (CF '24)
Disaggregated, Vendor-Generic APUs with CXL
Induction in IEEE-HKN (Mu Nu Chapter) June 2022
Officially inducted into the Mu Nu Chapter of IEEE-HKN, the chapter of Politecnico di Torino.
I'm a naturally curious person, always eager to explore new ideas, dissect problems, and find solutions. One of my biggest passions outside of engineering is medicine — I grew up idolizing Dr. House, and I've always loved the mindset of diagnosing problems and figuring out solutions. This approach extends beyond my work; I apply it to everyday life, always searching for ways to understand and fix things.
To take a break from my daily routine, I turn to sports, both indoor and outdoor: skiing, tennis, football, basketball, and padel, to volleyball — yes, I was a hyperactive kid.
Beyond sports, music has been a big part of my life. I played piano and flute for over eight years.